Analog PLL | |||||||||||||||
Model Name |
|
||||||||||||||
Description |
is frequency modulated by the first VCO (UUT2). The frequency modulated voltage is available at node FM. This voltage is demodulated by the PLL that consists of the phasedetector (UUT3), an analog filter (UUT4) and the second VCO (UUT5). The demodulated voltage is available at node OUT_PLL. The simulation should run until 200 us. |
||||||||||||||
Dependencies |
|
||||||||||||||
Source | See source code | ||||||||||||||
Results | See results |