Analog-to-digital converter
Model Name | A2D(BHV_RF)
Symbol |
Generics |
Name | Type | Default | Unit | Min | Description
PMAX_DBM | REAL | -100.0 | dBm |  | maximum power amplitude
RIN | REAL | 50.0 | Ohm | >0.0 | input resistance
Ports |
Interface | Name | Type/Nature | Mode | Description
terminal | A | ELECTRICAL |  | analog input
terminal | GND | ELECTRICAL |  | analog ground
signal | D | BIT_VECTOR | out | digital output
signal | CLK | BIT | in | clock input
Description | This model describes an analog to digital converter. The conversion is done by successive approximation in a digital process at every rising clock edge.
Dependencies |
Logical Library | Design Unit/Design Entity
IEEE_proposed | ELECTRICAL_SYSTEMS
IEEE | MATH_REAL
Source | See source code
Example | See test-bench