Independent Voltage Step Source
Model Name | STEP(V1)
Symbol |
Generics |
Name | Type | Default | Unit | Min | Description
AMPL | REAL | 1.0 | V |  | magnitude
T_DELAY | TIME | 1ms | TIME |  | delay
T_RISE | REAL | 1.0 | s | >=0.0 | rise time
Ports |
Interface | Name | Type/Nature | Description
terminal | P | ELECTRICAL | positive terminal
terminal | N | ELECTRICAL | negative terminal
Description | P and N are the positive and negative element terminals. The initial voltage value is 0. The voltage is 0 until T_DELAY. The value after time T_DLEAY + T_RISE is AMPL.
Dependencies |
Logical Library | Design Unit/Design Entity
IEEE_proposed | ELECTRICAL_SYSTEMS
Source | See source code
Example | See test-bench