D-to-A Converter  
Model Name   D2A(IDEAL)  
Symbol   No Symbol  
Generics  
Name   Type   Default   Unit   Description  
VHIGH   REAL   5.0   V   high voltage  
TD_01   TIME   0ns   TIME   posedge delay  
TD_10   TIME   0ns   TIME   negedge delay  
TRISE   REAL   0.0   s   rising time  
TFALL   REAL   0.0   s   falling time  
 
Ports  
Interface   Name   Type/Nature   Mode   Description  
signal   S_IN   STD_LOGIC   in   input signal  
terminal   OUTP   ELECTRICAL     output terminal  
 
Description   The output voltage is set to VHIGH for input signal values
of '1' and 'H'. Otherwise it is set to 0.0. The function To_Bit
from the package STD_LOGIC_1164 is used for signal conversion.
The characteristic of the changes of the output voltage depends
on the values of the generic parameters.

 
Dependencies  
Logical Library   Design Unit/Design Entity  
IEEE_proposed   ELECTRICAL_SYSTEMS  
IEEE   STD_LOGIC_1164  
 
Source   See source code  
Example   See test-bench