Pseudorandom binary source
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PRBS(SHIFT_REGISTER)
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POLYGRAD
| INTEGER
| 2
| -
| >1
| <35
| order of generator polynomial
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SEED
| BIT_VECTOR
| "01"
| -
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| <length(POLYGRAD)
| initial bit vector of fsr
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BIT_TIME
| TIME
| 1us
| s
| >0
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| time duration of binary values
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BIT_DEL
| TIME
| 0us
| s
| >=0
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| initial time delay
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signal
| BIT_OUT
| BIT
| out
| binary output
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This model describes a pseudorandom generator built up as a shift register with feedback. The register length can be choosen between 2 and 34. A generator polynomial is implemented which produces a sequence of maximum length.
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See source code
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