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<!DOCTYPE model SYSTEM "/usr/local/vamdoc-1.0.2-kluwer/config/model.dtd"><model>
  <symbol>../symbol/pll.png</symbol>
  <comments>
    <title>Phase-locked loop</title>
    <model_name>PLL(LINEAR)</model_name>
    <library>N/A</library>
    <structure>N/A</structure>
    <description>This model describes a linear analog Phase-locked loop.<br></br>It consists of a multiplying mixer, an oscillator and<br></br>a lowpass filter. Additional splitter blocks are inserted<br></br>compared to the PLL realization in section 7.5.<br></br>The characteristics of the blocks can be parameterized.<br></br></description>
    <link_source><A HREF="../src/pll.vhd">See source code</A></link_source>
    <reference> Best, R.: Phase-locked loops: design, simulation, and applications.<br></br> 5th edition, McGraw-Hill, 2003<br></br> <br></br></reference>
    <dependency>
      <library>IEEE_proposed</library>
      <design_unit>ELECTRICAL_SYSTEMS</design_unit>
    </dependency>
    <dependency>
      <library>IEEE</library>
      <design_unit>MATH_REAL</design_unit>
    </dependency>
    <dependency>
      <library>WORK</library>
      <design_unit>VCO(ANALOG)</design_unit>
    </dependency>
    <dependency>
      <library>WORK</library>
      <design_unit>MIXER(RF)</design_unit>
    </dependency>
    <dependency>
      <library>WORK</library>
      <design_unit>LOWPASS(BHV_RF)</design_unit>
    </dependency>
  </comments>
  <interface>
    <parameter>
      <name>VCO_TONE_DBM</name>
      <type>REAL</type>
      <default>-30.0</default>
      <unit></unit>
      <comment></comment>
    </parameter>
    <parameter>
      <name>VCO_FREQ_0</name>
      <type>REAL</type>
      <default>1.0E06</default>
      <unit></unit>
      <comment></comment>
    </parameter>
    <parameter>
      <name>VCO_PHASE_0</name>
      <type>REAL</type>
      <default>0.0</default>
      <unit></unit>
      <comment></comment>
    </parameter>
    <parameter>
      <name>VCO_K_FREQ</name>
      <type>REAL</type>
      <default>1.0E09</default>
      <unit></unit>
      <comment></comment>
    </parameter>
    <parameter>
      <name>MIX_GAIN_DB</name>
      <type>REAL</type>
      <default>0.0</default>
      <unit></unit>
      <comment></comment>
    </parameter>
    <parameter>
      <name>MIX_IIP3</name>
      <type>REAL</type>
      <default>-10.0</default>
      <unit></unit>
      <comment></comment>
    </parameter>
    <parameter>
      <name>LPF_GAIN_DB</name>
      <type>REAL</type>
      <default>0.0</default>
      <unit></unit>
      <comment></comment>
    </parameter>
    <parameter>
      <name>LPF_3DBFREQ</name>
      <type>REAL</type>
      <default>1.0E5</default>
      <unit></unit>
      <comment></comment>
    </parameter>
    <parameter>
      <name>LPF_GRADE</name>
      <type>INTEGER</type>
      <default>1</default>
      <unit></unit>
      <comment></comment>
    </parameter>
    <port>
      <port_id>terminal</port_id>
      <name>P_REFCLK</name>
      <port_type>ELECTRICAL</port_type>
      <comment></comment>
    </port>
    <port>
      <port_id>terminal</port_id>
      <name>P_GND</name>
      <port_type>ELECTRICAL</port_type>
      <comment></comment>
    </port>
    <port>
      <port_id>terminal</port_id>
      <name>P_OUT</name>
      <port_type>ELECTRICAL</port_type>
      <comment></comment>
    </port>
    <port>
      <port_id>terminal</port_id>
      <name>P_OUTCLK</name>
      <port_type>ELECTRICAL</port_type>
      <comment></comment>
    </port>
    <port>
      <port_id>terminal</port_id>
      <name>P_VDD</name>
      <port_type>ELECTRICAL</port_type>
      <comment></comment>
    </port>
  </interface>
</model>
