Case Study

Let us imagine a case study consisting of a new chip called StarChip. Some of the main specifications are listed on that slide. This corresponds to a 16-bit micro-controller used in automotive industry.

StarChip #1

Your definitive solution for embedded electronics

16 bit MPU with 16 MHz external quartz, on-chip PLL providing internal 133 MHz operating clock
128 Kb RAM, 3 general purpose ports (A, B, C, 8 bits), 4 analog inputs 12 bits, CAN interface

SIGNAL	Description
VDD	Positive supply
VSS	Logic Ground
VDD_OSC	Oscillator supply
VSS_OSC	Oscillator ground
PA[0..7]	Data port A (programmable drive)
PB[0..7]	Data port B (programmable drive)
PC[0..7]	Data port C (programmable drive) external 66MHz data/address
ADC In[0..3]	4 analog inputs (12 bit resolution)
CAN Tx	CAN interface (high power, 1MHz)
CAN Rx	CAN interface (high power, 1MHz)
XTL_1, XTL_2	Quartz oscillator 16MHz
CAPA	PLL external capacitance
RESET	Reset microcontroller

Several tests were conducted by the customer and a huge list of problems appeared. Now that you learnt some rules about low emission floor-planning, you are probably able to understand the origin of the listed problems. In this case study, you act as an EMC engineer which is called urgently to improve the floor-planning of the chip (without changing the chip layout which would cost too much), in order to save the contract.

Warning:

Reliability problems (over current) on pin
23 Ground bounce: voltage drop around 500mV (spec: 50mV)
VDD bounce: voltage drop around 700mV (spec 50mV)
ADC measured resolution: 6 bits (required 10 bits)
CAN bus erratic problems
Oscillator PLL sometimes do not lock

Send an expert and solve the problem, otherwise we cancel the 500,000 chip contract

The first action is to identify which block is a noisy block, which part is a sensitive part. Then you can try to assign the various I/os to specific pins.

SIGNAL	Description	Emission	Susceptibility	Remark	Assign to
VDD	Positive supply
VSS	Logic Ground
VDD_OSC	Oscillator supply
VSS_OSC	Oscillator ground
PA[0..7]	Data port A (programmable drive)
PB[0..7]	Data port B (programmable drive)
PC[0..7]	Data port C (programmable drive) external 66MHz data/address
ADC In[0..3]	4 analog inputs (12 bit resolution)
CAN Tx	CAN interface (high power, 1MHz)
CAN Rx	CAN interface (high power, 1MHz)
XTL_1, XTL_2	Quartz oscillator 16MHz
CAPA	PLL external capacitance
RESET	Reset microcontroller

Place your solution here. Several good solutions exist. Was this an imaginary scenario? No! Most of the contents of this course come from severe ignorance of EMC problems, that are found at the end of the design cycle and may induce losses of millions of Euro.