| EMC for ICs > Models for EMC Simulation | |
This slide illustrates the roadmap for IC models with their application to EMC prediction. The physical model of the MOS never stops improving thanks to device models like BSIM, BSIM3, BSIM4. In parallel, high level languages are developed to describe the structure of the IC (Verilog, Vhdl), or its specifications (SystemC), or its analog/digital behavior (VHDL-Ams).
The roadmap for EMC prediction is quite new. Today the ICEM model exists, and its extension to higher frequencies is under investigations (ICEM-HF). Finally, the IBIS group works continuously on improved modeling of the IC interface and packaging through IBIS v2,v3 and markup language IBIS-ML.
Looking at higher frequencies is one of the most important issued in the future, as several bandwidth are become important for home, mobile, local links, or high rate networking. We notice that 32 bit micro-controllers are significantly more noisy that 16 bit circuits, as they operate at much higher clock rates. It may be anticipated that the next generation 32-64 bit microprocessors will emit even higher levels of energy, with significant rays in critical bands over the GHz.
In this example concerning a 0.18µm 300MHz ASIC, we see that some harmonics of the basic clock signal are observed in TEM cell up to 3GHz. The ICEM model has been used to try to predict the measured spectrum, with some interesting correlation, although the amplitude of the harmonic contents is not well forecast.
Finally, could the ICEM model be used in susceptibility? This is still an opened question but the UTE task force in France has started a debate and technical research on this topic. The goal is to propose some enhancements in the structural description of IC models in order to predict the first order response of the IC to external electromagnetic wave.
| EMC for ICs > Models for EMC Simulation > Future of EMC Models | |