NOTE:  After speed optimization, the resulting netlist can be simulated,
       using the .vcs file supplied and a copy of the original
       testbench module in Netlist_TB.v.

       The approximated TSMC simulation library, tcbn90ghp_v2001.v, 
       supplies timing for correct simulation in this example; however,
       normally, an SDF file would be used with it to provide exactly
       correct delays.
